1. Field of the Invention
The present invention relates to integrated circuits and, more specifically but not exclusively, to techniques for calibrating output drivers in integrated circuits to compensate for PVT variations.
2. Description of the Related Art
This section introduces aspects that may help facilitate a better understanding of the invention. Accordingly, the statements of this section are to be read in this light and are not to be understood as admissions about what is prior art or what is not prior art.
It is well known that integrated circuitry is susceptible to process, voltage, and temperature (PVT) variations in which the circuitry functions differently due to differences in the manufacturing process between different instances of an integrated circuit as well as due to changes in voltage and/or temperature over time for a given instance of the integrated circuit. It is also well known to perform periodic or intermittent calibration operations to characterize the extent of changes in circuit functionality as a result of such PVT variations and then use that characterization to adjust the circuitry to compensate for the effects of those PVT variations.
Output buffers (aka output drivers), which transmit outgoing signals from an integrated circuit, are an example of a type of circuitry that is susceptible to PVT variations and is calibrated in order to compensate for the effects of those PVT variations. A conventional technique for calibrating output buffers involves connecting an output buffer to an external resistor having a known resistance level, using the output buffer to drive an outgoing signal across the external resistor, and measuring the voltage across the external resistor to characterize the drive strength (e.g., current level) of the output buffer. Depending on the results, the configuration of the output buffer can then be adjusted to achieve a desired drive strength.
In order to avoid interfering with on-line operations, integrated circuits are typically designed with extra output buffers, referred to herein as calibration buffers, that are used only for PVT calibration, where the calibrated PVT characteristics of a given calibration buffer are assumed to be the same as the PVT characteristics of a number of on-line output buffers. A given integrated circuit may have multiple calibration buffers because the integrated circuit may have different types of on-line output buffers (for example, pull-up buffers and pull-down buffers) as well as output buffers operating under different voltage domains. Furthermore, since PVT conditions may vary over different portions of an integrated circuit, there may be different calibration buffers for different banks of output drivers around the periphery of the integrated circuit. These different calibration buffers are connected to multiple output resistors (having possibly different resistance levels) via multiple output pins, which reduce the number of output pins available for the rest of the integrated circuitry.